1. Field of the Invention
The present invention relates to a semiconductor integrated circuit provided with a semiconductor memory circuit having a redundancy function and a method for transferring address data.
2. Description of the Related Art
A conventional semiconductor memory device has a redundancy function of replacing a regular memory cell with a spare memory cell when the regular memory cell is defective (see, e.g., Jpn. Pat. Appln. KOKAI Publication No. 2000-182394).
FIG. 1 shows the structure of a conventional semiconductor memory circuit having such a redundancy function as mentioned above.
In the conventional semiconductor memory circuit, a fuse box 100 comprises a fuse block 101 and a fuse transferring circuit 102. The fuse block 101 stores enable data and address data. The enable data indicates whether or not a spare memory cell included in a spare cell array 112 is used, and the address data indicate the address of a defective regular memory cell which is replaced with the spare memory cell. The fuse transferring circuit 102 transfers the enable data and the address data to a memory circuit 110. In the following description, data including the enable data and the address data will be referred to as fuse data.
The fuse block 101 comprises enable fuses 103 and address fuses 104. Each of the enable fuses 103 comprises one fuse, and each of the address fuse 104 comprises a number of fuses. The enable fuses 103 pair with the address fuses 104 as respective sets. The sets of enable fuses 103 and address fuses 104 are associated with spare memory cells included in the spare cell array 112, respectively.
The enable fuse 103 stores enable data indicating whether the spare memory cell associated with the enable fuse 103 is used or not. When the enable data indicates that the spare cell memory cell is used, address data indicating the address of a defective regular cell which is replaced with the spare memory cell is stored in the address fuse 104 pairing with the enable fuse 103. On the other hand, when the enable data indicates that the spare memory cell is not used, data “0” is stored in a number of fuses included in the address fuse 104 pairing with the enable fuse 103 storing the enable data.
All fuse data stored in the enable fuses 103 and address fuses 104 is transferred to a redundancy latch circuit 113 included in the memory circuit 110, and the address data indicating the address of the defective regular memory cell which is replaced with the spare memory cell is stored in the redundancy latch circuit 113.
In a method for transferring the fuse data in the above semiconductor memory circuit, it is also necessary to transfer data stored in an address fuse 104 which does not store address data to the redundancy latch circuit 113. Therefore, it is necessary to provide in advance a region for the address fuse not storing address data. Inevitably, the area of a chip must be increased in order to make a semiconductor memory circuit having a greater capacity in the future.